Calculate Digital Inputs in HSpice Software Specific Output - 1375 Words

Calculate Digital Inputs in HSpice Software to Obtain Specific Output (Other (Not Listed) Sample) Content: Procedure 1 Browse to http://vcl.fullerton.edu/ 2 Select "CSUF Login" as the Authentication Method. 3 Click "Proceed to Login" 4 CSUF Login: 5 Enter your CSUF username password 6 Click "Login" 7 Click "New Reservation" in the left-hand pane. 8 Please select the environment you want to use from the list: 9 Select "ECS Win7x64 HSPICE" 10 When would you like to use the application? Select "Now" or make a reservation at specific time. Under duration , I chose 4 hours click "Get RDP File" Launch the "ECS Win7x64 HSPICE.rdp" file.On launching the romote computer the following interface was shownClicking on Hspice icon the following interface appearsI then clicked on open and browsed to the location of the hspice files on the remote computer.Then the simulation button becomes active.Then clicked on Edit NL to edit the code as follows.* Skeleton Inverter Test* File: hw3.sp* EGCP 456****** This is a skeleton file which uses the PTM models to test the characteristics** of a si ngle CMOS inverter.****-----------------------------------------------------------------------------.include 'macros.sp'.include '65nm_bulk.pm'.param lambda=32.5nm vdd=1.1V H=4.options accurate post.temp 27.tran .1ps 4ns.op.global vdd vcc gnd.probe* Power SupplyVvcc vcc gnd dc=vdd* inverter with a pfet width of* 4*lambda and nfet width of 2*lambdaXp0 vcc in out vcc pfet Wi='2*2*lambda'Xn0 gnd in out nfet Wi='2*lambda'* input signal, which is a square wave at 1GHzVa12 in gnd pulse (0, vdd, 500ps, 0ps, 0ps, 500ps, 1000ps)** measure statements**measure the rise and fall time, and get the average transition time.measure tran tpdr trig V(in) val='vdd/2' rise=2+ targ V(out) val='vdd/2' fall=2.measure tran tpdf trig V(in) val='vdd/2' fall=2+ targ V(out) val='vdd/2' rise=2.measure tpd param = '(tpdr+tpdf)/2'.plot tpd vdd*you may add more measure statements as you like.endOn simulating the above code , the values generated within the .LIS file gives us the rise time and fall time .The values from the .LIS file are used to fil the table.A plot of variation in voltages with respect to rise time and fall times is shown below.Where tpdf is the fall time, tpdr is the rise time and the tpd is the average of the tpdr and tpdf.Vm Device length width tLH tHL VDD/2 NMOS 65nm 130nm 10.89p 13.82p PMOS 130nm 130nm 10.89p 13.82p 0.4VDD NMOS 65nm 130nm 16.71p 21.85p PMOS 130nm 130nm 16.71p 21.85p 0.6VDD NMOS 65nm 130nm 39.76p 50.49p PMOS 130nm 130nm 39.76p 50.49p 2. Explanation of how changing the sizing of the transistors is able to change the switching threshold of the inverterFor the VDD/2 switching threshold, the average current is given by a measure card as 10.71A which corresponds to an average power of 10.71W (2 points). For...